142 search results - page 12 / 29 » Test architecture design and optimization for three-dimensio... |
FPGA
2004
ACM
14 years 9 days ago
2004
ACM
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
DAC
2009
ACM
14 years 3 months ago
2009
ACM
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
DAC
1998
ACM
14 years 9 months ago
1998
ACM
Dynamic power management schemes (also called policies) can be used to control the power consumption levels of electronic systems, by setting their components in different states,...
GECCO
2007
Springer
14 years 2 months ago
2007
Springer
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...