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    HASE
    1998
    IEEE
    128views Control Systems» more  HASE 1998»
    In-Parameter-Order: A Test Generation Strategy for Pairwise Testing
    13 years 12 months ago
    In-Parameter-Order: A Test Generation Strategy for Pairwise Testing
    Download  www-cse.uta.edu
    Yu Lei, Kuo-Chung Tai
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    VTS
    1996
    IEEE
    75views Hardware» more  VTS 1996»
    A new test pattern generation method for delay fault testing
    13 years 12 months ago
    A new test pattern generation method for delay fault testing
    Download  www.lirmm.fr
    S. Cremoux, Christophe Fagot, Patrick Girard, Chri...
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    DAC
    1992
    ACM
    93views Computer Architecture» more  DAC 1992»
    SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits
    13 years 11 months ago
    SWiTEST: A Switch Level Test Generation System for CMOS Combinational Circuits
    Download  poisson.usc.edu
    Kuen-Jong Lee, Charles Njinda, Melvin A. Breuer
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    STVR
    2008
    53views more  STVR 2008»
    IPOG/IPOG-D: efficient test generation for multi-way combinatorial testing
    13 years 7 months ago
    IPOG/IPOG-D: efficient test generation for multi-way combinatorial testing
    Download  csrc.nist.gov
    Yu Lei, Raghu Kacker, D. Richard Kuhn, Vadim Okun,...
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    JISE
    2000
    71views more  JISE 2000»
    Compact Test Generation Using a Frozen Clock Testing Strategy
    13 years 7 months ago
    Compact Test Generation Using a Frozen Clock Testing Strategy
    Download  www.iis.sinica.edu.tw
    Elizabeth M. Rudnick, Miron Abramovici
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