244 search results - page 17 / 49 » Testing Digital Circuits with Constraints |
DFT
1997
IEEE
14 years 2 months ago
1997
IEEE
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
ITC
1998
IEEE
14 years 2 months ago
1998
IEEE
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
TCAD
1998
13 years 9 months ago
1998
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
ATS
2005
IEEE
14 years 3 months ago
2005
IEEE
— Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confid...
ICCD
2006
IEEE
14 years 6 months ago
2006
IEEE
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...