Sciweavers

1610 search results - page 20 / 322
» Testing Patterns
Sort
View
ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 6 months ago
On Identifying Don't Care Inputs of Test Patterns for Combinational Circuits
Given a test set for stuck-at faults, some of primary input values may be changed to opposite logic values without losing fault coverage. We can regard such input values as don’...
Seiji Kajihara, Kohei Miyase
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
14 years 1 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee
PAMI
2008
166views more  PAMI 2008»
13 years 10 months ago
Robust Real-Time Pattern Matching Using Bayesian Sequential Hypothesis Testing
This paper describes a method for robust real time pattern matching. We first introduce a family of image distance measures, the "Image Hamming Distance Family". Members ...
Ofir Pele, Michael Werman
DDECS
2007
IEEE
90views Hardware» more  DDECS 2007»
14 years 1 months ago
Test Pattern Generator for Delay Faults
A method of generating test pairs for the delay faults is presented in this paper. The modification of the MISR register gives the source of test pairs. The modification of this r...
Tomasz Rudnicki, Andrzej Hlawiczka
AMAI
2002
Springer
13 years 9 months ago
An Empirical Test of Patterns for Nonmonotonic Inference
: It is claimed that human inferential apparatus offers interesting ground in order to consider the intuitions of artificial intelligence researchers about the inference patterns a...
Rui Da Silva Neves, Jean-François Bonnefon,...