1610 search results - page 7 / 322 » Testing Patterns |
ATS
1998
IEEE
14 years 2 months ago
1998
IEEE
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
ISCAS
1999
IEEE
14 years 2 months ago
1999
IEEE
The main objectives of Built-In Self Test (BIST) are the design of test pattern generator circuits which achieve the highest fault coverage, require the shortest sequence of test ...
XPU
2005
Springer
14 years 3 months ago
2005
Springer
Executable acceptance testing allows both to specify customers’ expectations in the form of the tests and to compare those to actual results that the software produces. The resul...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
This paper presents a scalable method to generate close to minimal size test pattern sets for stuck-at faults in scan based circuits. The method creates sets of potentially compat...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper describes the implementation of a test pattern language using STIL [1], the IEEE Standard Test Interface Language (1450-1999), in a next generation, open architecture A...