— Accurate generation of circuit specifications from test signatures is a difficult problem, since analytical expressions cannot precisely describe the nonlinear relationships ...
Byoungho Kim, Hongjoong Shin, Ji Hwan (Paul) Chun,...
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
Various X-filling methods have been proposed for reducing the shift and/or capture power in scan testing. The main drawback of these methods is that X-filling for low power leads t...
S. Balatsouka, V. Tenentes, Xrysovalantis Kavousia...
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...
Abstract--Real-time embedded systems (RTESs) are becoming increasingly ubiquitous, controlling a wide variety of popular and safety-critical devices. Effective testing techniques c...