80 search results - page 6 / 16 » Testing embedded-core based system chips |
DATE
2003
IEEE
14 years 21 days ago
2003
IEEE
Test data compression (TDC) is a promising low-cost methodology for System-on-a-Chip (SOC) test. This is due to the fact that it can reduce not only the volume of test data but al...
HIPEAC
2005
Springer
14 years 28 days ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
With increasing design sizes and adoption of System on a Chip (SoC) methodology, design synthesis and test automation tools are hitting capacity and performance bottlenecks. Curre...
VLSI
2005
Springer
14 years 27 days ago
2005
Springer
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...