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» The Architecture Tradeoff Analysis Method
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HPCA
2003
IEEE
14 years 8 months ago
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
María Jesús Garzarán, Milos P...
FPL
1995
Springer
106views Hardware» more  FPL 1995»
13 years 11 months ago
Some Notes on Power Management on FPGA-Based Systems
Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuumtube electronics [1], the increasing clock ...
Eduardo I. Boemo, Guillermo González de Riv...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 28 days ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
14 years 29 days ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli
HICSS
2003
IEEE
165views Biometrics» more  HICSS 2003»
14 years 29 days ago
The Birth of An E-Business System Architecture: Conflicts, Compromises, and Gaps in Methods
This paper describes the system architecture development process in an international ICT company, which is building a comprehensive e-business system for its customers. The implem...
Kari Smolander