100 search results - page 13 / 20 » The Challenges of Synthesizing Hardware from C-Like Language... |
CHES
2006
Springer
13 years 10 months ago
2006
Springer
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
ERSA
2006
13 years 8 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
ICALP
2009
Springer
14 years 7 months ago
2009
Springer
We present an AC1 (logDCFL) algorithm for checking LTL formulas over finite paths, thus establishing that the problem can be efficiently parallelized. Our construction provides a f...
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
Designing custom-extensible instructions for Extensible Processors1 is a computationally complex task because of the large design space. The task of automatically matching candida...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...