68 search results - page 5 / 14 » The Concurrent Matching Switch Architecture |
SDL
2003
14 years 6 days ago
2003
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
CDES
2007
14 years 9 days ago
2007
- In this paper, we present a number of parallel and fault-tolerant routing schemes for a set of nanoscale spin-wave architectures. The architectures considered here have several f...
SIGCOMM
2010
ACM
13 years 11 months ago
2010
ACM
Ideally, enterprise administrators could specify fine-grain policies that drive how the underlying switches forward, drop, and measure traffic. However, existing techniques for fl...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on su...
DAC
1996
ACM
14 years 3 months ago
1996
ACM
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...