244 search results - page 13 / 49 » The Design and Analysis of a Cache Architecture for Texture ... |
RT
2004
Springer
14 years 25 days ago
2004
Springer
We introduce a tiled 3D MIP map representation of global illumination data. The representation is an adaptive, sparse octree with a “brick” at each octree node; each brick con...
TOG
2002
13 years 7 months ago
2002
In this paper, we present a system for interactive computation of global illumination in dynamic scenes. Our system uses a novel scheme for caching the results of a high quality p...
ASAP
1997
IEEE
13 years 11 months ago
1997
IEEE
In this paper we present an approach for quantitative analysis of application-specific dataflow architectures. The approach allows the designer to rate design alternatives in a qu...
MICRO
2007
IEEE
14 years 1 months ago
2007
IEEE
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...