Sciweavers

244 search results - page 43 / 49
» The Design and Analysis of a Cache Architecture for Texture ...
Sort
View
SIGGRAPH
2000
ACM
13 years 12 months ago
The digital Michelangelo project: 3D scanning of large statues
We describe a hardware and software system for digitizing the shape and color of large fragile objects under non-laboratory conditions. Our system employs laser triangulation rang...
Marc Levoy, Kari Pulli, Brian Curless, Szymon Rusi...
DAC
1999
ACM
13 years 12 months ago
Exact Memory Size Estimation for Array Computations without Loop Unrolling
This paper presents a new algorithm for exact estimation of the minimum memory size required by programs dealing with array computations. Memory size is an important factor a ecti...
Ying Zhao, Sharad Malik
VLSID
2006
IEEE
142views VLSI» more  VLSID 2006»
14 years 8 months ago
Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors
- Security protocols, such as IPSec and SSL, are being increasingly deployed in the context of networked embedded systems. The resource-constrained nature of embedded systems and, ...
Nachiketh R. Potlapally, Srivaths Ravi, Anand Ragh...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
CODES
2001
IEEE
13 years 11 months ago
Embedded UML: a merger of real-time UML and co-design
In this paper, we present a proposal for a UML profile called `Embedded UML'. Embedded UML represents a synthesis of various ideas in the real-time UML community, and concept...
Grant Martin, Luciano Lavagno, Jean Louis-Guerin