225 search results - page 5 / 45 » The Design and Optimization of SOC Test Solutions |
DFT
2006
IEEE
14 years 3 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
ISVLSI
2008
IEEE
14 years 4 months ago
2008
IEEE
Re-using the network in a NoC-based system as a test access mechanism is an attractive solution as pointed out by several authors. As a consequence, testing of NoC-based SoCs is b...
DAC
2002
ACM
14 years 10 months ago
2002
ACM
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
TVLSI
2008
13 years 9 months ago
2008
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...
DAC
2003
ACM
14 years 10 months ago
2003
ACM
Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...