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» The Design and Performance of a Conflict-Avoiding Cache
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ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
14 years 23 days ago
The Block-Based Trace Cache
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Bryan Black, Bohuslav Rychlik, John Paul Shen
ICCD
2004
IEEE
149views Hardware» more  ICCD 2004»
14 years 5 months ago
Adaptive Selection of an Index in a Texture Cache
For a specified application, there is an opportunity to improve cache performance by smart choosing of index bits of a cache. A texture cache for texture mapping of 3D computer gr...
Chun-Ho Kim, Lee-Sup Kim
DSD
2008
IEEE
108views Hardware» more  DSD 2008»
13 years 10 months ago
Reducing Leakage through Filter Cache
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
Roberto Giorgi, Paolo Bennati
CASES
2007
ACM
14 years 14 days ago
Cache leakage control mechanism for hard real-time systems
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia...
DAC
2010
ACM
13 years 8 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra