867 search results - page 28 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
ICCD
2005
IEEE
14 years 5 months ago
2005
IEEE
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
ICCD
2011
IEEE
12 years 8 months ago
2011
IEEE
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
ICS
2007
Tsinghua U.
14 years 2 months ago
2007
Tsinghua U.
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
DATE
2000
IEEE
14 years 27 days ago
2000
IEEE
We present a technique for fast estimation of the power consumed by the cache and bus sub-system of a parameterized system-on-a-chip design for a given application. The technique ...
RTAS
2000
IEEE
14 years 26 days ago
2000
IEEE
Congested networks and overloaded servers resulting from the ever growing number of Internet users contribute to the lack of good quality video streaming over the Internet. We pro...