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» The Design of High-Performance Microprocessors at Digital
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NIME
2004
Springer
354views Music» more  NIME 2004»
14 years 1 months ago
The Electronic Sitar Controller
This paper describes the design of an Electronic Sitar controller, a digitally modified version of Saraswati’s (the Hindu Goddess of Music) 19-stringed, pumpkin shelled, traditi...
Ajay Kapur, Ari J. Lazier, Philip Davidson, R. Sco...
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
13 years 12 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
CEE
2007
110views more  CEE 2007»
13 years 7 months ago
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid...
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
14 years 1 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
HPCA
2006
IEEE
14 years 8 months ago
Last level cache (LLC) performance of data mining workloads on a CMP - a case study of parallel bioinformatics workloads
With the continuing growth in the amount of genetic data, members of the bioinformatics community are developing a variety of data-mining applications to understand the data and d...
Aamer Jaleel, Matthew Mattina, Bruce L. Jacob