6834 search results - page 1317 / 1367 » The Fail-Heterogeneous Architectural Model |
DAC
2004
ACM
15 years 4 days ago
2004
ACM
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
DAC
2005
ACM
15 years 4 days ago
2005
ACM
We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implem...
DAC
2006
ACM
15 years 4 days ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...
DAC
2006
ACM
15 years 4 days ago
2006
ACM
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
SIGSOFT
2001
ACM
14 years 12 months ago
2001
ACM
Prior research in software environments focused on three important problems-- tool integration, artifact management, and process guidance. The context for that research, and hence...