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» The High Level Architecture for Simulations
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188
Voted
CGO
2004
IEEE
15 years 10 months ago
VHC: Quickly Building an Optimizer for Complex Embedded Architectures
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
Michael Dupré, Nathalie Drach, Olivier Tema...
219
Voted
INFOCOM
1998
IEEE
15 years 10 months ago
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
Donpaul C. Stephens, Hui Zhang
176
Voted
CASES
2008
ACM
15 years 8 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
187
Voted
ISQED
2007
IEEE
160views Hardware» more  ISQED 2007»
16 years 12 days ago
On-Chip Inductance in X Architecture Enabled Design
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
Santosh Shah, Arani Sinha, Li Song, Narain D. Aror...
INFOCOM
2008
IEEE
16 years 16 days ago
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup
—Continuous growth in network link rates poses a strong demand on high speed IP lookup engines. While Ternary Content Addressable Memory (TCAM) based solutions serve most of toda...
Weirong Jiang, Qingbo Wang, Viktor K. Prasanna