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» The High Level Architecture for Simulations
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DATE
2010
IEEE
192views Hardware» more  DATE 2010»
14 years 1 months ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
ICCD
2005
IEEE
131views Hardware» more  ICCD 2005»
14 years 2 months ago
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management
As power density increases exponentially, run-time regulation of operating temperature by dynamic thermal management becomes imperative. This paper proposes a novel approach to re...
Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, ...
VLSID
2002
IEEE
105views VLSI» more  VLSID 2002»
14 years 9 months ago
A Heuristic for Clock Selection in High-Level Synthesis
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
GRID
2004
Springer
14 years 2 months ago
High-Level Grid Application Environment to Use Legacy Codes as OGSA Grid Services
One of the biggest obstacles in the wide-spread industrial take-up of Grid technology is the existence of a large amount of legacy code that is not accessible as Grid services. Th...
Péter Kacsuk, Ariel Goyeneche, Thierry Dela...
CSMR
2004
IEEE
14 years 12 days ago
High-Level Polymetric Views of Condensed Run-time Information
Understanding the run-time behavior of object-oriented legacy systems is a complex task due to factors such as late binding and polymorphism. Current approaches extract and use in...
Stéphane Ducasse, Michele Lanza, Roland Ber...