2424 search results - page 60 / 485 » The High Level Architecture for Simulations |
162
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IAJIT
2010
15 years 4 months ago
2010
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
153
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ACSAC
2003
IEEE
15 years 11 months ago
2003
IEEE
1 DOD Joint Vision 2020 (JV2020) is the integrated multi-service planning document for conduct among coalition forces of future warfare. It requires the confluence of a number of k...
158
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
125
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DATE
2008
IEEE
16 years 6 days ago
2008
IEEE
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
153
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LCPC
2004
Springer
15 years 11 months ago
2004
Springer
Trimaran is an integrated compilation and performance monitoring infrastructure. The architecture space that Trimaran covers is characterized by HPL-PD, a parameterized processor a...