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» The High Level Architecture for Simulations
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VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 9 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
WSC
2004
13 years 10 months ago
Hierarchical Production Planning Using a Hybrid System Dynamic - Discrete Event Simulation Architecture
Hierarchical production planning provides a formal bridge between long-term plans and short-term schedules. A hybrid simulation-based production planning architecture consisting o...
Jayendran Venkateswaran, Young-Jun Son, Albert Jon...
DAC
2004
ACM
14 years 2 months ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
14 years 28 days ago
Efficient High-Level modeling in the networking domain
-- Starting Electronic System Level (ESL) design flows with executable High-Level Models (HLMs) has the potential to sustainably improve productivity. However, writing good HLMs fo...
Christian Zebelein, Joachim Falk, Christian Haubel...
PADS
1996
ACM
14 years 22 days ago
Design of High Level Modelling / High Performance Simulation Environments
Advances in massively parallel platforms are increasing the prospects for high performance discrete event simulation. Still the di culty in parallel programming persists and there...
Bernard P. Zeigler, Doohwan Kim