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» The High Level Architecture for Simulations
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DATE
2003
IEEE
117views Hardware» more  DATE 2003»
14 years 2 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
ISHPC
1999
Springer
14 years 1 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
JUCS
2010
96views more  JUCS 2010»
13 years 7 months ago
Multi-Level Context Management and Inference Framework for Smart Telecommunication Services
: Telco operators and other players are searching for intelligent value-added services, i.e., communication applications that take advantage of the huge amount of user data availab...
Carlos Baladrón Zorita, Alejandro Cadenas, ...
FPL
2010
Springer
134views Hardware» more  FPL 2010»
13 years 6 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...
IPPS
2007
IEEE
14 years 3 months ago
Speculative Flow Control for High-Radix Datacenter Interconnect Routers
High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and lo...
Cyriel Minkenberg, Mitchell Gusat