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MICRO
1997
IEEE
127views Hardware» more  MICRO 1997»
13 years 12 months ago
Exploiting Dead Value Information
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI provides assertions that certain register values are dead, meaning they will n...
Milo M. K. Martin, Amir Roth, Charles N. Fischer
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)
- TOSHIBA has developed mobile multi-media engine SoC, we call as S1G, which can realize low power ISDB-T one-segment decode in 42mW for eight months short period of time. Since MP...
K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano
DAC
2007
ACM
14 years 8 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
HPCA
2003
IEEE
14 years 8 months ago
Slipstream Execution Mode for CMP-Based Multiprocessors
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
Khaled Z. Ibrahim, Gregory T. Byrd, Eric Rotenberg
NOCS
2009
IEEE
14 years 2 months ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas