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CADE
2007
Springer
16 years 5 months ago
System Description: E-KRHyper
The E-KRHyper system is a model generator and theorem prover for first-order logic with equality. It implements the new E-hyper tableau calculus, which integrates a superposition-b...
Björn Pelzer, Christoph Wernhard
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
15 years 11 months ago
A high-level debug environment for communication-centric debug
—A large part of a modern SOC’s debug complexity resides in the interaction between the main system components. ion-level debug moves the abstraction level of the debug process...
Kees Goossens, Bart Vermeulen, Ashkan Beyranvand N...
121
Voted
GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 11 months ago
Timing-driven N-way decomposition
Logic decomposition has been extensively used to optimize the worst-case delay and the area in the technology independent phase. Bi-decomposition is one of the state-of-art techni...
David Bañeres, Jordi Cortadella, Michael Ki...
DATE
2008
IEEE
115views Hardware» more  DATE 2008»
15 years 11 months ago
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Yang Qu, Juha-Pekka Soininen, Jari Nurmi
ISMVL
2008
IEEE
122views Hardware» more  ISMVL 2008»
15 years 11 months ago
RevLib: An Online Resource for Reversible Functions and Reversible Circuits
Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, re...
Robert Wille, Daniel Große, Lisa Teuber, Ger...