194 search results - page 9 / 39 » The Performance Potential of Data Dependence Speculation |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
ASPLOS
2004
ACM
14 years 27 days ago
2004
ACM
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors that execute instructions speculatively. Some of the best current predic...
CODES
2008
IEEE
14 years 1 months ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...