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» The Primacy of Process Architecture
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DAC
2009
ACM
14 years 10 months ago
Online cache state dumping for processor debug
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
DAC
2009
ACM
14 years 10 months ago
Context-sensitive timing analysis of Esterel programs
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
Lei Ju, Bach Khoa Huynh, Samarjit Chakraborty, Abh...
DAC
2002
ACM
14 years 10 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
DAC
2004
ACM
14 years 10 months ago
Toward a methodology for manufacturability-driven design rule exploration
Resolution enhancement techniques (RET) such as optical proximity correction (OPC) and phase-shift mask (PSM) technology are deployed in modern processes to increase the fidelity ...
Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, De...
WWW
2005
ACM
14 years 9 months ago
Accessibility: a Web engineering approach
Currently, the vast majority of web sites do not support accessibility for visually impaired users. Usually, these users have to rely on screen readers: applications that sequenti...
Peter Plessers, Sven Casteleyn, Yeliz Yesilada, Ol...
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