1564 search results - page 48 / 313 » The STEP Modular Architecture |
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
DATE
2010
IEEE
14 years 21 days ago
2010
IEEE
— The use of dynamic voltage and frequency scaling (DVFS) in contemporary multicores provides significant protection from unpredictable thermal events. A side effect of DVFS can ...