The optimal sizing of a small autonomous hybrid power system can be a very challenging task, due to the large number of design settings and the uncertainty in key parameters. This ...
Yiannis A. Katsigiannis, Pavlos S. Georgilakis, Em...
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
Abstract— We propose a power and constellation-size adaptation scheme for the multicast system employing multilevel quadrature amplitude modulation (MQAM) with discrete constella...
In this paper, we study optimal bu er design in high-performance VLSI systems. Speci cally, we design a bu er for a given load such that chip area and power dissipation are minima...