Sciweavers

1728 search results - page 34 / 346
» The Size of Power Automata
Sort
View
CPC
2000
65views more  CPC 2000»
13 years 8 months ago
Simple Matroids With Bounded Cocircuit Size
We examine the specialization to simple matroids of certain problems in extremal matroid theory that are concerned with bounded cocircuit size. Assume that each cocircuit of a simp...
Joseph E. Bonin, Talmage James Reid
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 5 months ago
Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
Mihir R. Choudhury, Quming Zhou, Kartik Mohanram
ICCAD
1996
IEEE
114views Hardware» more  ICCAD 1996»
14 years 20 days ago
An efficient approach to simultaneous transistor and interconnect sizing
In this paper, we study the simultaneous transistor and interconnect sizing (STIS) problem. We de ne a class of optimization problems as CH-posynomial programs and reveal a genera...
Jason Cong, Lei He
ACSD
2006
IEEE
129views Hardware» more  ACSD 2006»
14 years 2 months ago
Extended Timed Automata and Time Petri Nets
Timed Automata (TA) and Time Petri Nets (TPN) are two well-established formal models for real-time systems. Recently, a linear transformation of TA to TPNs preserving reachability...
Patricia Bouyer, Pierre-Alain Reynier, Serge Hadda...
ENTCS
2006
173views more  ENTCS 2006»
13 years 8 months ago
Concurrent LSC Verification: On Decomposition Properties of Partially Ordered Symbolic Automata
Partially Ordered Symbolic Automata (POSAs) are used as the semantical foundation of visual formalisms like the scenario based language of Live Sequence Charts (LSCs). To check whe...
Tobe Toben, Bernd Westphal