20 search results - page 1 / 4 » The Synchronization Power of Coalesced Memory Accesses |
TPDS
2010
13 years 5 months ago
2010
—Multicore architectures have established themselves as the new generation of computer architectures. As part of the one core to many cores evolution, memory access mechanisms ha...
EUROPAR
2001
Springer
13 years 12 months ago
2001
Springer
A swap instruction, which exchanges a value in memory with a value of a register, is available on many architectures. The primary application of a swap instruction has been for pro...
FAST
2011
12 years 11 months ago
2011
Although Flash Memory based Solid State Drive (SSD) exhibits high performance and low power consumption, a critical concern is its limited lifespan along with the associated relia...
ISLPED
2005
ACM
14 years 28 days ago
2005
ACM
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
Leveraging the power of nowadays graphics processing units for robust power grid simulation remains a challenging task. Existing preconditioned iterative methods that require inco...