Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...
State spaces are commonly used representations of system behavior. A state space may be derived from a model of system behavior but can also be obtained through process mining. For...
H. M. W. (Eric) Verbeek, A. Johannes Pretorius, Wi...
We consider the symmetric Darlington synthesis of a p × p rational symmetric Schur function S with the constraint that the extension is of size 2p×2p. Under the assumption that S...
Laurent Baratchart, P. Enqvist, A. Gombani, M. Oli...