11 search results - page 1 / 3 » The Synthesis of a Hardware Scheduler for Non-Manifest Loops |
36
Voted
DSD
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near ...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
MICRO
2005
IEEE
14 years 4 months ago
2005
IEEE
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
ASPDAC
2005
ACM
14 years 1 months ago
2005
ACM
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
DATE
2009
IEEE
14 years 5 months ago
2009
IEEE
Many embedded control systems comprise several control loops that are closed over a network of computation nodes. In such systems, complex timing behavior and communication lead t...