Sciweavers

29082 search results - page 5755 / 5817
» The Time-Triggered Model of Computation
Sort
View
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 11 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
MMM
2010
Springer
141views Multimedia» more  MMM 2010»
13 years 11 months ago
Slow Intelligence Systems
: Networks and distributed computing systems are becoming increasingly important and at the same time, more and more critical to the world of Information Technology. This rash spre...
Shi-Kuo Chang
CIKM
2008
Springer
13 years 11 months ago
Intra-document structural frequency features for semi-supervised domain adaptation
In this work we try to bridge the gap often encountered by researchers who find themselves with few or no labeled examples from their desired target domain, yet still have access ...
Andrew Arnold, William W. Cohen
3DPVT
2006
IEEE
295views Visualization» more  3DPVT 2006»
13 years 11 months ago
Efficient Sparse 3D Reconstruction by Space Sweeping
This paper introduces a feature based method for the fast generation of sparse 3D point clouds from multiple images with known pose. We extract sub-pixel edge elements (2D positio...
Joachim Bauer, Christopher Zach, Horst Bischof
CODES
2006
IEEE
13 years 11 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
« Prev « First page 5755 / 5817 Last » Next »