1536 search results - page 293 / 308 » The Underlying Logic of Hoare Logic |
MEMOCODE
2003
IEEE
14 years 19 days ago
2003
IEEE
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
TLDI
2003
ACM
14 years 18 days ago
2003
ACM
Standard ML employs an opaque (or generative) semantics of datatypes, in which every datatype declaration produces a new type that is different from any other type, including othe...
FPGA
2003
ACM
14 years 17 days ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
CF
2010
ACM
14 years 13 days ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
IPPS
2002
IEEE
14 years 9 days ago
2002
IEEE
In a paper presented last year at WMPP’01 [Walker01], we described the initial prototype of an associative processor implemented using field-programmable logic devices (FPLDs). ...