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DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 10 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
14 years 6 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
CASES
2007
ACM
14 years 1 months ago
A fast and generic hybrid simulation approach using C virtual machine
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Asch...
BMCBI
2008
135views more  BMCBI 2008»
13 years 10 months ago
Using Generalized Procrustes Analysis (GPA) for normalization of cDNA microarray data
Background: Normalization is essential in dual-labelled microarray data analysis to remove nonbiological variations and systematic biases. Many normalization methods have been use...
Huiling Xiong, Dapeng Zhang, Christopher J. Martyn...
DAC
2003
ACM
14 years 10 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav