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CODES
2006
IEEE
15 years 10 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
CODES
2004
IEEE
15 years 8 months ago
System-on-chip validation using UML and CWL
In this paper, a novel method for high-level specification and validation of SoC designs using UML is proposed. UML is introduced as a formal model of specification for SoC design...
Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo...
COMBINATORICS
2000
100views more  COMBINATORICS 2000»
15 years 4 months ago
Separability Number and Schurity Number of Coherent Configurations
To each coherent configuration (scheme) C and positive integer m we associate a natural scheme C(m) on the m-fold Cartesian product of the point set of C having the same automorph...
Sergei Evdokimov, Ilia N. Ponomarenko
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
15 years 8 months ago
Effective OpenMP Implementation and Translation For Multiprocessor System-On-Chip without Using OS
- It is attractive to use the OpenMP as a parallel programming model on a Multiprocessor System-On-Chip (MPSoC) because it is easy to write a parallel program in the OpenMP and the...
Woo-Chul Jeun, Soonhoi Ha
DATE
2006
IEEE
117views Hardware» more  DATE 2006»
15 years 10 months ago
Formal verification of systemc designs using a petri-net based representation
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...
Daniel Karlsson, Petru Eles, Zebo Peng