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DAC
2008
ACM
14 years 10 months ago
An integrated nonlinear placement framework with congestion and porosity aware buffer planning
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
Tung-Chieh Chen, Ashutosh Chakraborty, David Z. Pa...
DAC
2007
ACM
14 years 10 months ago
TROY: Track Router with Yield-driven Wire Planning
In this paper, we propose TROY, the first track router with yield-driven wire planning to optimize yield loss due to random defects. As the probability of failure (POF) computed f...
Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
DAC
2002
ACM
14 years 10 months ago
Towards global routing with RLC crosstalk constraints
Conventional global routing minimizes total wire length and congestion. Experiments using large industrial benchmark circuits show that up to 24% of nets in such routing solutions...
James D. Z. Ma, Lei He
DAC
2006
ACM
14 years 10 months ago
Process variation aware OPC with variational lithography modeling
Optical proximity correction (OPC) is one of the most widely used resolution enhancement techniques (RET) in nanometer designs to improve subwavelength printability. Conventional ...
Peng Yu, Sean X. Shi, David Z. Pan
ICML
2004
IEEE
14 years 10 months ago
Nonparametric classification with polynomial MPMC cascades
A new class of nonparametric algorithms for high-dimensional binary classification is proposed using cascades of low dimensional polynomial structures. Construction of polynomial ...
Sander M. Bohte, Markus Breitenbach, Gregory Z. Gr...