48 search results - page 3 / 10 » The Validity of Retiming Sequential Circuits |
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Abstract-- In this paper we present the Statistical Retimingbased Timing Analysis (SRTA) algorithm. The goal is to compute the timing slack distribution for the nodes in the timing...
ICCD
1997
IEEE
13 years 11 months ago
1997
IEEE
Abstract— In this paper we consider the problem of clustering sequential circuits subject to a bound on the area of each cluster, with the objective of minimizing the clock perio...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
—Optimizing sequential cycles is essential for many types of high-performance circuits, such as pipelines for packet processing. Retiming is a powerful technique for speeding pip...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...