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» The Validity of Retiming Sequential Circuits
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SBCCI
2003
ACM
115views VLSI» more  SBCCI 2003»
14 years 6 days ago
Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
FPGA
1998
ACM
160views FPGA» more  FPGA 1998»
13 years 11 months ago
A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs
In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
Peichen Pan, Chih-Chang Lin
ICCAD
2004
IEEE
180views Hardware» more  ICCAD 2004»
14 years 3 months ago
Physical placement driven by sequential timing analysis
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
Aaron P. Hurst, Philip Chong, Andreas Kuehlmann
DAC
2009
ACM
14 years 8 months ago
Improving testability and soft-error resilience through retiming
State elements are increasingly vulnerable to soft errors due to their decreasing size, and the fact that latched errors cannot be completely eliminated by electrical or timing ma...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes