This paper presents the emulation of an embedded system with hard real time constraints and response times of about 220µs. We show that for such fast reactive systems, the softwa...
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the best distribution of routing segment lengths and the best mix of pass transist...
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert