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FPGA
1999
ACM
122views FPGA» more  FPGA 1999»
13 years 11 months ago
Exploiting FPGA-Features During the Emulation of a Fast Reactive Embedded System
This paper presents the emulation of an embedded system with hard real time constraints and response times of about 220µs. We show that for such fast reactive systems, the softwa...
Karlheinz Weiß, Thorsten Steckstor, Gernot K...
FPGA
2007
ACM
153views FPGA» more  FPGA 2007»
14 years 1 months ago
GlitchLess: an active glitch minimization technique for FPGAs
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
FPGA
1999
ACM
155views FPGA» more  FPGA 1999»
13 years 11 months ago
FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the best distribution of routing segment lengths and the best mix of pass transist...
Vaughn Betz, Jonathan Rose
FPL
1998
Springer
135views Hardware» more  FPL 1998»
13 years 11 months ago
Designing for Xilinx XC6200 FPGAs
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert