570 search results - page 112 / 114 » The behavior of resistive circuits |
SBCCI
2005
ACM
14 years 1 months ago
2005
ACM
This work addresses the problem of application mapping in networks-on-chip (NoCs). It explores the importance of characterizing network traffic to effectively predict NoC energy c...
MTDT
2003
IEEE
14 years 22 days ago
2003
IEEE
ct Defect-based testing for digital logic concentrates primarily on methods of test application, including for example at-speed structural tests and IDDQ testing. In contrast, defe...
24
Voted
ISCA
2002
IEEE
14 years 11 days ago
2002
IEEE
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Available techniques for testing core-based systems-on-a-chip (SOCs) do not provide a systematic means for synthesising low-overhead test architectures and compact test solutions....
DAC
2010
ACM
13 years 10 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...