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ISCAS
2003
IEEE
62views Hardware» more  ISCAS 2003»
14 years 1 months ago
Simple noise formulas for MOS analog design
The designer needs simple and accurate models to estimate noise in MOS transistors as a function of their size, bias point and technology. In this work, we present a simple, conti...
Alfredo Arnaud, Carlos Galup-Montoro
ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
14 years 1 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler
ITC
2003
IEEE
153views Hardware» more  ITC 2003»
14 years 1 months ago
An Efficient and Effective Methodology on the Multiple Fault Diagnosis
In this paper, we analyze failing circuits and propose a multiple-fault diagnosis approach. Our methodology has been validated experimentally and has proved to be highly efficient...
Zhiyuan Wang, Kun-Han Tsai, Malgorzata Marek-Sadow...
ISQED
2000
IEEE
91views Hardware» more  ISQED 2000»
14 years 1 months ago
Probabilistic Bottom-Up RTL Power Estimation
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
Ricardo Ferreira, A.-M. Trullemans, José C....
ASPDAC
1999
ACM
98views Hardware» more  ASPDAC 1999»
14 years 29 days ago
A Scheduling Method for Synchronous Communication in the Bach Hardware Compiler
− In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from...
Ryoji Sakurai, Mizuki Takahashi, Andrew Kay, Akihi...