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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICCAD
2003
IEEE
170views Hardware» more  ICCAD 2003»
14 years 4 months ago
Evaluation of Placement Techniques for DNA Probe Array Layout
DNA probe arrays have emerged as a core genomic technology that enables cost-effective gene expression monitoring, mutation detection, single nucleotide polymorphism analysis and ...
Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu ...
SOSP
2009
ACM
14 years 4 months ago
The multikernel: a new OS architecture for scalable multicore systems
Commodity computer systems contain more and more processor cores and exhibit increasingly diverse architectural tradeoffs, including memory hierarchies, interconnects, instructio...
Andrew Baumann, Paul Barham, Pierre-Évarist...
CVPR
2010
IEEE
14 years 4 months ago
Optimizing One-Shot Recognition with Micro-Set Learning
For object category recognition to scale beyond a small number of classes, it is important that algorithms be able to learn from a small amount of labeled data per additional clas...
Kevin Tang, Marshall Tappen, Rahul Sukthankar, Chr...
CVPR
2010
IEEE
14 years 3 months ago
Estimating Optical Properties of Layered Surfaces Using the Spider Model
Many object surfaces are composed of layers of different physical substances, known as layered surfaces. These surfaces, such as patinas, water colors, and wall paintings, have mo...
Tetsuro Morimoto, Robby Tan, Rei Kawakami, Katsush...