1994 search results - page 70 / 399 » The design of a high performance low power microprocessor |
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...
VLSID
2004
IEEE
14 years 9 months ago
2004
IEEE
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
CSREAESA
2003
13 years 10 months ago
2003
This paper presents a comparison of power-aware video decoding techniques that utilize Dynamic Voltage Scaling (DVS) capability. Three techniques were simulated and compared in te...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
GLOBECOM
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract— Scheduled wireless mesh networks (WMNs) represent an important paradigm in the development of high speed wireless access networks. As a consequence of [1], it can be sh...