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» The design of a high performance low power microprocessor
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ISLPED
2003
ACM
100views Hardware» more  ISLPED 2003»
14 years 2 months ago
Checkpointing alternatives for high performance, power-aware processors
High performance processors use checkpointing to rapidly recover from branch mispredictions and possibly other exceptions. We demonstrate that conventional checkpointing becomes u...
Andreas Moshovos
TSP
2008
111views more  TSP 2008»
13 years 8 months ago
Coding Schemes for User Cooperation in Low-Power Regimes
We consider the design of cooperation coding schemes for a two-user multi-access channel (MAC). In particular, we consider two block Markov coding schemes, namely, the multiplexed...
Guosen Yue, Xiaodong Wang, Zigui Yang, Anders H&os...
CODES
2007
IEEE
14 years 3 months ago
Performance modeling for early analysis of multi-core systems
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
Reinaldo A. Bergamaschi, Indira Nair, Gero Dittman...
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
GLVLSI
1998
IEEE
124views VLSI» more  GLVLSI 1998»
14 years 1 months ago
A VLSI High-Performance Encoder with Priority Lookahead
In this paper we introduce a VLSI priority encoder that uses a novel priority lookahead scheme to reduce the delay for the worse case operation of the circuit, while maintaining a...
José G. Delgado-Frias, Jabulani Nyathi