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» The design of a low energy FPGA
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FPL
2008
Springer
91views Hardware» more  FPL 2008»
13 years 10 months ago
Power efficient DSP datapath configuration methodology for FPGA
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
Stephen McKeown, Roger Woods, John McAllister
ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
14 years 1 months ago
Low cost instruction cache designs for tag comparison elimination
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
Youtao Zhang, Jun Yang 0002
ISLPED
2007
ACM
104views Hardware» more  ISLPED 2007»
13 years 10 months ago
Low power soft-output signal detector design for wireless MIMO communication systems
Energy-efficient realization of soft-output signal detection is of great importance in emerging high-speed multiple-input multiple-output (MIMO) wireless communication systems. T...
Sizhong Chen, Tong Zhang
IPC
2007
IEEE
14 years 2 months ago
Design and Validation of a Low-Power Network Node for Pervasive Applications
Pervasive computing refers to making many computing devices available throughout the physical environment, while making them effectively invisible to the user. To further increase...
Juan-Carlos Cano, Carlos Miguel Tavares Calafate, ...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
14 years 5 months ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras