517 search results - page 6 / 104 » The design of a low energy FPGA |
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
FCCM
2007
IEEE
13 years 7 months ago
2007
IEEE
This paper describes a novel architecture for the hardware implementation of non-linear multi-layer cellular neural networks. This makes it feasible to design CNNs with millions o...
DATE
2010
IEEE
14 years 13 days ago
2010
IEEE
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
GLVLSI
1999
IEEE
13 years 11 months ago
1999
IEEE
A novel low power and low transistor count static energy recovery full adder (SERF) is presented in this paper. The power consumption and general characteristics of the SERF adder...