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» The design of a low energy FPGA
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CASES
2008
ACM
13 years 9 months ago
Optimus: efficient realization of streaming applications on FPGAs
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...
Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, D...
DAC
2001
ACM
14 years 8 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
DAC
2007
ACM
14 years 8 months ago
Dynamic Power Management with Hybrid Power Sources
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, N...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 1 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram