Sciweavers

2605 search results - page 25 / 521
» The many levels of CSCL
Sort
View
DATE
2006
IEEE
147views Hardware» more  DATE 2006»
14 years 2 months ago
Quantitative analysis of transaction level models for the AMBA bus
The increasing complexity of embedded systems pushes system designers to higher levels of abstraction. Transaction Level Modeling (TLM) has been proposed to model ation in systems...
Gunar Schirner, Rainer Dömer
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
14 years 2 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
14 years 1 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
EUROMICRO
1998
IEEE
14 years 24 days ago
System Level Modelling for Hardware/Software Systems
Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisat...
Jeroen Voeten, P. H. A. van der Putten, Marc Geile...
GRAPHICSINTERFACE
2007
13 years 10 months ago
A GPU based interactive modeling approach to designing fine level features
In this paper we propose a GPU based interactive geometric modeling approach to designing fine level features on subdivision surfaces. Displacement mapping is a technique for addi...
Xin Huang, Sheng Li, Guoping Wang