This paper presents a new Multilevel hierarchical FPGA (MFPGA) architecture that unifies two unidirectional programmable networks: A predictible downward network based on the But...
Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Ha...
—In this paper, we propose a novel on-chip communication scheme by dividing the resources of a traditional packet-switched network-on-chip between a packet-switched and a circuit...
Mehdi Modarressi, Hamid Sarbazi-Azad, Mohammad Arj...
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
In this paper we present AntNet, a novel adaptive approach to routing tables learning in packet-switched communications networks. AntNet is inspired by the stigmergy model of commu...
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...